DocumentCode :
2988289
Title :
Tuned LC Clock Buffers with Static Phase Adjust
Author :
Reddy, ViswaBharath ; Titus, Ward ; Kenney, Jack
Author_Institution :
Analog Devices Inc., Somerset
fYear :
2007
fDate :
3-5 June 2007
Firstpage :
519
Lastpage :
522
Abstract :
An LC tank providing clock buffering for a half-rate binary phase detector in a clock and data recovery circuit is described. This paper analyzes the trade-offs involved in choosing the Q of the LC tank, presents an automatic tuning method for the LC tank and describes a method to program the phase of the clock relative to the input data using 2 LC tanks with mismatched center frequencies. This work is part of a transceiver chip for XFP fiber optic application fabricated in a 0.13 mum CMOS process.
Keywords :
buffer circuits; circuit tuning; phase detectors; synchronisation; CMOS process; LC clock buffers; XFP fiber optic; automatic tuning method; clock recovery; data recovery; half-rate binary phase detector; static phase adjust; Circuit optimization; Clocks; Energy consumption; Latches; Phase detection; Phase frequency detector; Phase locked loops; Quantization; RLC circuits; Timing; Buffers; Phase matching; Phase shifters; RLC circuits; circuit tuning;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 IEEE
Conference_Location :
Honolulu, HI
ISSN :
1529-2517
Print_ISBN :
1-4244-0530-0
Electronic_ISBN :
1529-2517
Type :
conf
DOI :
10.1109/RFIC.2007.380937
Filename :
4266485
Link To Document :
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