A highly linear switched-capacitor DAC for multi-bit sigma-delta D/A applications

Author

Ju, P. ; Suyama, K. ; Ferguson, P., Jr. ; Lee, W.

Author_Institution

Dept. of Electr. Eng., Columbia Univ., New York, NY, USA

Volume

1

fYear

1995

fDate

30 Apr-3 May 1995

Firstpage

9

Abstract

The technique uses subintervals in the clock to deliver multiple charge packets to holding capacitors. It avoids distortion effects of mismatched capacitors and finite opamp gain. A 5-level DAC using the proposed technique is designed with an audio band multi-bit sigma-delta D/A converter that achieves a dynamic range of 92 dB and a THD of better than -94 dB. The 5-level SC DAC has been fabricated in a 2-μm CMOS process

Keywords

CMOS integrated circuits; audio systems; digital-analogue conversion; harmonic distortion; sigma-delta modulation; switched capacitor networks; 2 micron; CMOS process; THD; audio band; dynamic range; holding capacitors; multi-bit sigma-delta D/A applications; multiple charge packets; subintervals; switched-capacitor DAC; Capacitors; Circuits; Delta-sigma modulation; Dynamic range; Feedback loop; Multi-stage noise shaping; Performance gain; Sampling methods; Semiconductor device noise; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on

Conference_Location

Seattle, WA

Print_ISBN

0-7803-2570-2

Type

conf

DOI

10.1109/ISCAS.1995.521438

Filename

521438