An approach on underfill material selection for the low-k Flip Chip Plastic Ball Grid Array (FCPBGA)

The role of underfill is expanding from preserving solder joint reliability to also protecting fragile low-k chip dielectric layers in flip chip packaging. The aim of this study is to pre-evaluate or presume the reliability performance of several commercial underfill materials for the balance protection against four critical area of locations (four factors) such as package warpage, low-k interface layer dielectric (ILD) or underfill/die interface layer, solder bumps and back die edge in Plastic Flip Chip Ball Grid Array (FCPGBA) packages. The distribution of thermal strain and stress of the package, warpage measurement and solder bump fatigue for different commercial underfills have been assessed and compared via a linear and nonlinear viscoplastic finite element analysis (FEA) under accelerated temperature cycling conditions. The data properties of underfills for simulation have been extracted by using Thermal Mechanical Analyzer (TMA) and Dynamic Mechanical Analyzer (DMA). Both experiments were conducted in-house due to consistent test method compared with the data from supplier. The results from FEA were summarized and discussed to characterize the performance of each underfill material. A total of four factors of equal ranking importance have been considered in this underfill pre-selection approach. The position in the ranking is used to predict the most suitable underfill to be selected for good flip chip package reliability.