A parallel event-driven MOS timing simulator on distributed-memory multiprocessors

Author

Hsieh, Wen-Hsing ; Jou, Shyh-Jye ; Su, Chau-Chin

Author_Institution

Dept. of Electr. Eng., Nat. Central Univ., Chung-Li, Taiwan

Volume

1

fYear

1995

fDate

30 Apr-3 May 1995

Firstpage

574

Abstract

In this paper, PMOTA, a parallel event-driven relaxation-based algorithm for the timing simulation of MOS circuits, is proposed. Two new schemes, static data distribution and dynamic event assignment, are derived to reduce the communication overhead and achieve high speedup ratio, high processor utilization and balanced load among processor elements. Implementation results show that parallel simulations on distributed memory multiprocessor are feasible for large scale circuit simulation

Keywords

MOS logic circuits; circuit analysis computing; discrete event simulation; distributed memory systems; large scale integration; logic CAD; parallel algorithms; relaxation theory; timing; MOS circuits; PMOTA; balanced load; communication overhead; distributed-memory multiprocessors; dynamic event assignment; large scale circuit simulation; parallel event-driven relaxation-based algorithm; parallel simulations; processor utilization; speedup ratio; static data distribution; timing simulation; Centralized control; Circuit simulation; Computational modeling; Concurrent computing; Discrete event simulation; Multiprocessing systems; Parallel algorithms; Parallel processing; Partitioning algorithms; Timing;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1995. ISCAS '95., 1995 IEEE International Symposium on

Conference_Location

Seattle, WA

Print_ISBN

0-7803-2570-2

Type

conf

DOI

10.1109/ISCAS.1995.521578

Filename

521578