Development of PPRAM-link interface (PLIF) IP core for high-speed inter-SoC communication

Author

Okuma, Takanori ; Hashimoto, Koji ; Murakami, Kazuaki

Author_Institution

Dept. of Comput. Sci. & Commun. Eng., Kyushu Univ., Fukuoka, Japan

fYear

2001

fDate

2001

Firstpage

37

Lastpage

38

Abstract

We propose “PPRAM-Link”: a new high-speed communication standard for merged-DRAM/logic SoC architecture. The PPRAM-Link standard is composed of physical/logical layers and an API for the upper software layer, which are standardized by the PPRAM Consortium. We developed a PPRAM-Link Interface IP family, or `PLIF Core” that realizes logical protocols necessary for subaction-level communications, and it can be applied to various applications. In addition, we designed an FPGA-based PCI-to-PPRAM-Link board for inter-PC/WS communications

Keywords

application specific integrated circuits; computer interfaces; microprocessor chips; parallel memories; parallel processing; protocols; random-access storage; standards; API; FPGA-based PCI-to-PPRAM-Link board; PPRAM-Link Interface IP family; PPRAM-Link standard; PPRAM-link interface IP core; application programming interface; high-speed communication standard; high-speed inter-SoC communication; inter-PC/WS communications; logical protocols; merged-DRAM/logic SoC architecture; parallel processing RAM; physical/logical layers; subaction-level communications; upper software layer; Communication standards; Computer science; Electronic mail; Information science; Integrated circuit interconnections; Logic; Physical layer; Protocols; Software standards; Standards development;

fLanguage

English

Publisher

ieee

Conference_Titel

Design Automation Conference, 2001. Proceedings of the ASP-DAC 2001. Asia and South Pacific

Conference_Location

Yokohama

Print_ISBN

0-7803-6633-6

Type

conf

DOI

10.1109/ASPDAC.2001.913277

Filename

913277