Title :
Implementation of novel reflow profile of no-clean fluxes to enhance flux stability and oxide layer removal of the high lead solder bump
Author :
Amin, N. ; Ang Ye Cheah ; Lam Zi Yi ; Kornain, Z.
Author_Institution :
Dept. of Electr., Electron. & Syst. Eng., Univ. Kebangsaan Malaysia (UKM), Bangi, Malaysia
Abstract :
Various reflow profiles have been applied on different no-clean fluxes amount in removing the oxide layer of high lead solder bump. The wafers exposed to open air induce an oxide layer on the high lead solder bump. This oxide layer eventually creates the non wet phenomena in flip chip packaging. An experimental study is carried out by varying different soak time of the reflow profile to optimize the effectiveness of the flux in solving the eutectic and controlled collapse chip connection (C4) high lead bump issue, which indirectly solves the non wet issue. Visual inspection on high lead solder bump under high power microscope is carried out after reflow process. Die pull test is carried out on the solder joint strength analysis to test the solder bump strength. Besides, experiments on substrate cleanliness test, nonwet phenomena and die misalignment are also conducted with useful hints to be implemented.
Keywords :
flip-chip devices; solders; controlled collapse chip connection; die misalignment; die pull test; enhance flux stability; flip chip packaging; high lead solder bump; high power microscope; no-clean fluxes; non wet phenomena; oxide layer removal; reflow process; reflow profile; solder bump strength; solder joint strength analysis; substrate cleanliness test; visual inspection; Consumer electronics; Electronic mail; Lead compounds; Soldering; Solids; Stability; Systems engineering and theory; Temperature; Testing; Tiles;
Conference_Titel :
Electronic Manufacturing Technology Symposium (IEMT), 2008 33rd IEEE/CPMT International
Conference_Location :
Penang
Print_ISBN :
978-1-4244-3392-6
Electronic_ISBN :
1089-8190
DOI :
10.1109/IEMT.2008.5507833