Low-Power High-Voltage Non-overlapping Clock Generators for Switched-Capacitor step-up DC-DC Converters

Two low-power high-voltage non-overlapping clock generators are presented in this paper. One of them is based on the use of delay RC cells whereas the other one is based on the counting process of the output pulses generated by a digitally controlled oscillator (DCO). The DCO-based solution is more complex but more flexible than the RC-based configuration since it allows a dynamically programmable control of the non- overlapping time between the clock signals that can not be achieved with the RC-based approach. Simulated results of both architectures show that our proposed circuits lead to lower power consumption levels in comparison with conventional solutions. Experimental results of one of these architectures are also presented in order to show the feasibility of our designs which have been implemented using the 0.7mu I²T BCD technology from AMI semiconductor.