DocumentCode :
2994973
Title :
Programmable Connections in Neuromorphic Grids
Author :
Lin, Joseph ; Merolla, Paul ; Arthur, John ; Boahen, Kwabena
Author_Institution :
Univ. of Pennsylvania, Philadelphia
Volume :
1
fYear :
2006
fDate :
6-9 Aug. 2006
Firstpage :
80
Lastpage :
84
Abstract :
We describe asynchronous circuits that can relay spikes between multiple chips in a grid. These circuits interface with an on-chip SRAM to implement programmable connectivity among chips. We introduce a packet format that is compatible with updating the SRAM. From a high level specification, we synthesized and fabricated these circuits in an area of 0.206 mm2 in 0.18-mum CMOS technology. Test results that measure performance and demonstrate correct function on first silicon are presented.
Keywords :
SRAM chips; asynchronous circuits; integrated circuit interconnections; asynchronous circuits; neuromorphic grids; on-chip SRAM; packet format; programmable connections; Bandwidth; Biomedical engineering; Broadcasting; CMOS technology; Circuit synthesis; Circuit testing; Neuromorphics; Neurons; Random access memory; Relays;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
Conference_Location :
San Juan
ISSN :
1548-3746
Print_ISBN :
1-4244-0172-0
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2006.382000
Filename :
4267077
Link To Document :
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