A Unified Architecture for Supporting Operations of AES and ECC

In the recent years, embedded systems began to be used in sensitive applications such as personal digital assistants and smart cards. Due to very strict cost and power constrains, the support for cryptography provided by these devices is often limited to either public or private key primitives. This limitation is much more evident in devices where the cryptographic algorithms are implemented using hardware resources. In this paper, we propose an extension of a public-key cryptosystem to support also private-key, and we evaluate our architecture on FPGA platforms. In particular, we propose a new arithmetic unit in which the polynomial modular multiplication of ECC is extended to compute also the polynomial arithmetic operations over binary extended field of AES. We compare our design with an architecture obtained by instantiating state of the art implementation of AES and ECC and we evaluate the trade-offs. The experimental results show that our proposed architecture takes up less hardware resources. Nevertheless, the achieved performances are better compared to the ECC reference core, while the ones compared to AES only implementation are comparable with the state of the art.