DocumentCode :
2995979
Title :
Via hole technology for microstrip transmission lines and passive elements on high resistivity silicon
Author :
Strohm, K.M. ; Nuechter, P. ; Rheinfelder, C.N. ; Guehl, R.
Author_Institution :
DaimlerChrysler Res. Center, Ulm, Germany
Volume :
2
fYear :
1999
fDate :
13-19 June 1999
Firstpage :
581
Abstract :
A process is described for the realization of via holes for microstrip transmission lines and passive elements on high resistivity silicon (/spl rho/>4000 /spl Omega/cm, 100 mm diameter, 100 /spl mu/m thickness). Via hole etching with vertical sidewalls is performed using an advanced silicon etch (ASE) process. The measured and simulated inductance of the gold metallized via hole is 22 pH. Measurements on a ring resonator-isolated by 550 nm thermal oxide from the substrate-yield a dielectric constant /spl epsiv//sub r/=11.2 and a loss tangent tan/spl delta/ around 10/sup -4/ for the 4000 /spl Omega/cm silicon substrate. Attenuation of microstrip transmission lines are <0.1 dB/mm at 20 GHz.
Keywords :
MIMIC; dielectric losses; elemental semiconductors; etching; microstrip circuits; microstrip lines; permittivity; silicon; 100 micron; 20 GHz; 4000 ohmcm; 550 nm; Si; advanced silicon etch; attenuation; dielectric constant; loss tangent; microstrip transmission lines; mm-wave ICs; passive elements; ring resonator; simulated inductance; vertical sidewalls; via hole etching; via hole technology; Conductivity; Dielectric loss measurement; Dielectric measurements; Etching; Gold; Inductance measurement; Microstrip; Silicon; Transmission line measurements; Transmission lines;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Microwave Symposium Digest, 1999 IEEE MTT-S International
Conference_Location :
Anaheim, CA, USA
Print_ISBN :
0-7803-5135-5
Type :
conf
DOI :
10.1109/MWSYM.1999.779829
Filename :
779829
Link To Document :
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