Title :
Power analysis of hardware based motion estimation in a heterogeneous reconfigurable environment
Author :
Hussain, Moazzam ; Rahmatullah, Muhammad Mohsin
Author_Institution :
Centre for Adv. Studies in Eng., Islamabad, Pakistan
Abstract :
Motion estimation is the most computationally demanding task in MPEG-4 based video compression techniques. Motion estimation consumes 70% of the computational capability and its hardware realization contributes up to 60% of chip power. This paper describes our efforts in analyzing power consumption of motion estimation in custom VLSI architecture prototyped as a configurable system on a chip (CSoC). This CSoC exploits dynamic partial reconfiguration of FPGA to allow changing search techniques/ search area to facilitate efficient intermode decision. Dynamic partial reconfiguration adds flexibility in terms of chip area at the cost of overhead in time to reconfigure and extra power consumption during dynamic partial reconfiguration. We perform power analysis on hardware by taking configuration and hardware execution power into account and observe how frequency of partial reconfiguration affects net power consumption.
Keywords :
VLSI; data compression; field programmable gate arrays; motion estimation; system-on-chip; video coding; FPGA; MPEG-4 based video compression technique; configurable system on a chip; custom VLSI architecture; hardware based motion estimation; heterogeneous reconfigurable environment; power consumption analysis; Computer architecture; Costs; Energy consumption; Field programmable gate arrays; Hardware; MPEG 4 Standard; Motion estimation; Prototypes; Very large scale integration; Video compression;
Conference_Titel :
Quality Electronic Design, 2009. ASQED 2009. 1st Asia Symposium on
Conference_Location :
Kuala Lumpur
Print_ISBN :
978-1-4244-4952-1
Electronic_ISBN :
978-1-4244-4952-1
DOI :
10.1109/ASQED.2009.5206244