Hierarchical flowgraph integration for VLSI array processors

The structural properties of parallel recursive algorithms point to the feasibility of a Hierarchical Flow-graph integration (HIFI) design method for VLSI array processor design. The Hierarchical approach allows the designer to focus attention at the appropriate level of detail. Flow-graphs are used because they offer a powerful and convenient tool for describing many signal processing algorithms. Integration is used here to mean top-down integration - from algorithm analysis to VLSI array - as opposed to merely an integration of electronic components. The HIFI method is proposed as a design and description tool aiming specially at VLSI arrays for signal processing algorithms. The major issues involved are: the recursive algorithm decomposition, abstract notations, flow-graph (structural) and functional (behavior) description, temporal and structural decomposition, bi-directional mapping between graphic and textual codes, simulation and verification tools, and mapping from virtual array to actual architecture.