DocumentCode
299699
Title
S-Connect: from networks of workstations to supercomputer performance
Author
Nowatzyk, Andreas G. ; Browne, Michael C. ; Kelly, Edmund J. ; Parkin, Michael
Author_Institution
Sun Microsystems Comput. Corp., USA
fYear
1995
fDate
22-24 June 1995
Firstpage
71
Lastpage
82
Abstract
S-Connect is a new high speed, scalable interconnect system that has been developed to support networks of workstations to efficiently share computing resources. It uses off-the-shelf CMOS technology to directly drive fiber-optic systems at speeds greater than 1 Gbit/sec and can realize bisection bandwidths comparable to high-end MPP systems while being >10x more cost-effective. S-Connect systems do not rely on centralized switches, but rather are composed of adaptive, topology independent routing elements that are integrated into each node. The S-Connect routing algorithm is optimized for fine grained, irregular traffic and is designed to support high traffic loads, that can utilize most of the physically available bandwidth. Such traffic is typical of a distributed shared memory system, which is one of the intended applications. S-Connect innovations include a novel distributed phase locking method that allows global synchronization, HW support for multiple message priorities, in-band monitoring and control facilities, and a low overhead channel protocol that supports multiple in-transit messages on the same fiber. The first version of the S-Connect switching element has been successfully, implemented in a commercial 0.65 /spl mu/m CMOS process.
Keywords
distributed memory systems; local area networks; multiprocessor interconnection networks; network routing; optical fibre LAN; protocols; reconfigurable architectures; shared memory systems; synchronisation; workstations; 0.65 mum; 1 Gbit/s; S-Connect; S-Connect routing algorithm; S-Connect switching element; adaptive topology independent routing elements; bisection bandwidths; distributed phase locking method; distributed shared memory system; fiber-optic systems; fine grained irregular traffic; global synchronization; high speed scalable interconnect system; high traffic loads; high-end MPP systems; in-band control facilities; in-band monitoring facilities; low overhead channel protocol; multiple in-transit messages; multiple message priorities; off-the-shelf CMOS technology; shared computing resources; supercomputer performance; workstation networks; Algorithm design and analysis; Bandwidth; CMOS technology; Computer networks; Design optimization; Routing; Supercomputers; Switches; Topology; Workstations;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Architecture, 1995. Proceedings., 22nd Annual International Symposium on
Conference_Location
Santa Margherita Ligure, Italy
ISSN
1063-6897
Print_ISBN
0-89791-698-0
Type
conf
Filename
524550
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