Study of an Automated Precise SEU Fault Injection Technique

SRAM-based FPGAs are susceptible to SEUs. To emulate the effects of SEUs, a variety of fault injection techniques have been studied. As FPGA logic density continues to increase, injecting faults into full bit stream is very time consuming. To further study the SEU effects and the mitigation techniques, an advanced precise SEU fault injection technique is studied in this paper. With this technique, a novel system named automated precise fault injection system (APFIS) is made to inject faults into certain resource of the circuit, instead into the whole bit stream. In this paper, this system will be proved to be faster and more efficient by the success of injecting faults into two sets of designs. Using this system will encourage the utilization of FPGAs for space-based applications.