DocumentCode
2998482
Title
A Fully Integrated Spread Spectrum Clock Generator Using a Dual-Path Loop Filter
Author
Kao, Yao-Huang ; Hsieh, Yi-Bin
Author_Institution
Nat. Chiao-Tung Univ., Hsinchu
Volume
2
fYear
2006
fDate
6-9 Aug. 2006
Firstpage
7
Lastpage
10
Abstract
A fully integrated spread spectrum clock generator (SSCG) using the VCO direct modulation was presented. The dual-path loop filter in the phased locked loop was employed to reduce the required area of capacitance in the filter by using another charge pump circuit. In the meantime, the third charge pump was used to achieve the triangle modulation. The proposed circuit had been fabricated by TSMC 0.35 mum . The clock rate from 50 MHz to 480 MHz with center spread spectrum ratios with 0.5%-2% was verified. The size of chip area was 0.82times0.8 mm2 including the loop filter and the power consumption was 27.5 mW at 400 MHz.
Keywords
CMOS integrated circuits; UHF filters; UHF integrated circuits; UHF oscillators; capacitance; electromagnetic interference; phase locked loops; voltage-controlled oscillators; CMOS single-poly quadruple-metal process; VCO direct modulation; charge pump circuit; dual-path loop filter; electromagnetic interference; filter capacitance; frequency 400 MHz; fully integrated spread spectrum clock generator; phased locked loop filter; power 27.5 mW; power consumption; size 0.35 mum; triangle modulation signal; Bandwidth; Capacitors; Charge pumps; Circuits; Clocks; Electromagnetic interference; Filters; Frequency modulation; Spread spectrum communication; Voltage-controlled oscillators;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
Conference_Location
San Juan
ISSN
1548-3746
Print_ISBN
1-4244-0172-0
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2006.382194
Filename
4267272
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