DocumentCode :
2998578
Title :
A Digital Adaptive Filter Architecture for Hard-Disk Drive Read Channels
Author :
Ndjountche, Tertulien
Author_Institution :
Quebec Univ. at Hull, Gatineau
Volume :
2
fYear :
2006
fDate :
6-9 Aug. 2006
Firstpage :
31
Lastpage :
35
Abstract :
With the increasing recording densities, adaptive equalizers used in disk-drive read channels have to operate at high frequencies. Using traditional design techniques, a compromise has to be made between speed, power, latency and area of the chip. The proposed equalizer is based on an adaptive lattice filter with an improved stability and low-sensitivity to round-off noise due to the orthogonality between internal states. An increase of speed and a reduction of power consumption are achieved in the resulting structure by using high-speed and low-power multiplier architectures based on an improved partial product encoding and pipeline stages to reduce the length of critical paths.
Keywords :
CMOS memory circuits; adaptive equalisers; adaptive filters; digital filters; disc drives; hard discs; integrated circuit design; lattice filters; low-power electronics; multiplying circuits; stability; CMOS technology; adaptive equalizers; adaptive lattice filter; critical path length reduction; design techniques; digital adaptive filter architecture; hard-disk drive read channels; high-speed multiplier architectures; partial product encoding; pipeline stages; power consumption reduction; stability aspects; Adaptive equalizers; Adaptive filters; Delay; Disk recording; Energy consumption; Frequency; Hard disks; Lattices; Pipelines; Stability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 2006. MWSCAS '06. 49th IEEE International Midwest Symposium on
Conference_Location :
San Juan
ISSN :
1548-3746
Print_ISBN :
1-4244-0172-0
Electronic_ISBN :
1548-3746
Type :
conf
DOI :
10.1109/MWSCAS.2006.382200
Filename :
4267278
Link To Document :
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