• DocumentCode
    2999571
  • Title

    A scheduling framework for minimizing memory requirements of multirate DSP systems represented as dataflow graphs

  • Author

    Bhattacharyya, S.S. ; Buck, J.T. ; Ha, S. ; Lee, E.A.

  • Author_Institution
    Dept. of EECS, California Univ., Berkeley, CA, USA
  • fYear
    1993
  • fDate
    20-22 Oct 1993
  • Firstpage
    188
  • Lastpage
    196
  • Abstract
    Numerous design environments for signal processing use specification languages with semantics closely related to synchronous dataflow (SDF), a restricted form of dataflow that has proven efficient for describing and compiling multirate signal processing algorithms. An SDF representation allows the compiler freedom to explore different ways to sequence the computations in a program, and to evaluate the associated tradeoffs, such as those involving throughput, code size, and buffering requirements. To guide the scheduling process, compilers may apply some form of clustering, in which multiple computations are grouped together according to different criteria. The authors develop clustering techniques to synthesize minimum code size implementations of SDF programs, and describe techniques to incorporate arbitrary clustering strategies into a minimum code size scheduler
  • Keywords
    VLSI; circuit layout CAD; data flow graphs; digital signal processing chips; hardware description languages; high level synthesis; parallel languages; scheduling; VLSI; arbitrary clustering strategies; buffering requirements; code size; data flow graphs; design environments; loose interdependence algorithms; minimizing memory requirements; minimum code size scheduler; multiple computations; multirate DSP systems; scheduling framework; specification languages; synchronous dataflow; throughput; tightly interdependent graphs; Delay; Digital signal processing; Dynamic scheduling; Functional programming; Processor scheduling; Signal design; Signal processing; Signal processing algorithms; Signal synthesis; Throughput;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    VLSI Signal Processing, VI, 1993., [Workshop on]
  • Conference_Location
    Veldhoven
  • Print_ISBN
    0-7803-0996-0
  • Type

    conf

  • DOI
    10.1109/VLSISP.1993.404488
  • Filename
    404488