Author :
Rücker, H. ; Heinemann, B. ; Barth, R. ; Bolze, D. ; Drews, J. ; Fursenko, O. ; Grabolla, T. ; Haak, U. ; Höppner, W. ; Knoll, D. ; Marschmeyer, S. ; Mohapatra, N. ; Richter, H.H. ; Schley, P. ; Schmidt, D. ; Tillack, B. ; Weidner, G. ; Wolansky, D. ; Wul
Abstract :
A new scheme for the integration of high-performance HBTs with thin-film SOI CMOS is demonstrated. The thickness incompatibility problem of thin-body SOI CMOS and high-performance SiGe HBTs is solved by forming HBTs on silicon islands in the BOX. Low-resistance collector wells are realized by ion implantation into the SOI substrate. SiGe:C HBTs with fT/fmax values of 220 GHz/230 GHz and a BVCEO of 2.0 V and fully-depleted CMOS transistors with 90 nm gate length are fabricated on SOI wafers with 30 nm Si thickness.
Keywords :
CMOS integrated circuits; Ge-Si alloys; carbon; heterojunction bipolar transistors; ion implantation; millimetre wave bipolar transistors; nanotechnology; silicon-on-insulator; thin film circuits; 2.0 V; 220 GHz; 230 GHz; 30 nm; 90 nm; SOI substrate; SOI wafers; SiGe:C; fully-depleted CMOS transistors; heterojunction bipolar transistors; high-performance SiGe:C HBT; ion implantation; low-resistance collector wells; silicon islands; thickness incompatibility problem; thin-body SOI CMOS; thin-film SOI CMOS; BiCMOS integrated circuits; CMOS technology; Epitaxial growth; Fabrication; Germanium silicon alloys; Heterojunction bipolar transistors; Isolation technology; Radio frequency; Silicon germanium; Substrates;
