• DocumentCode
    3000569
  • Title

    Distributing Power Grid State Estimation on HPC Clusters - A System Architecture Prototype

  • Author

    Liu, Yan ; Jiang, Wei ; Jin, Shuangshuang ; Rice, Mark ; Chen, Yousu

  • Author_Institution
    Data Intensive Comput. Group, Pacific Northwest Nat. Lab., Richland, WA, USA
  • fYear
    2012
  • fDate
    21-25 May 2012
  • Firstpage
    1467
  • Lastpage
    1476
  • Abstract
    The future power grid is expected to further expand with highly distributed energy sources and smart loads. The increased size and complexity lead to increased burden on existing computational resources in energy control centers. Thus the need to perform real-time assessment on such systems entails efficient means to distribute centralized functions such as state estimation in the power system. In this paper, we present our experience of prototyping a system architecture that connects distributed state estimators individually running parallel programs to solve non-linear estimation procedure. Through our experience, we highlight the needs of integrating the distributed state estimation algorithm with efficient partition and data communication tools so that distributed state estimation has low overhead compared to the centralized solution. We build a test case based on the IEEE 118 bus system and partition the state estimation of the whole system model to available HPC clusters. The measurement from the test bed demonstrates the low overhead of our solution.
  • Keywords
    busbars; data communication; distribution networks; parallel programming; power grids; real-time systems; state estimation; HPC clusters; IEEE 118 bus system; data communication tools; distributed energy sources; distributing power grid; nonlinear estimation; parallel programs; real-time assessment; smart loads; state estimation; system architecture prototype; Computer architecture; Distributed databases; Partitioning algorithms; Power grids; Size measurement; State estimation; Parallel programming; distributed systems architecture; power grid;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel and Distributed Processing Symposium Workshops & PhD Forum (IPDPSW), 2012 IEEE 26th International
  • Conference_Location
    Shanghai
  • Print_ISBN
    978-1-4673-0974-5
  • Type

    conf

  • DOI
    10.1109/IPDPSW.2012.183
  • Filename
    6270815