DocumentCode :
3001995
Title :
Scheduling of DSP data flow graphs onto multiprocessors for maximum throughput
Author :
Shatnawi, Ali ; Ahmad, M.O. ; Swamy, M.N.S.
Author_Institution :
Dept. of Comput. Eng., Jordan Univ. of Sci. & Technol., Irbid, Jordan
Volume :
6
fYear :
1999
fDate :
36342
Firstpage :
386
Abstract :
A novel technique to obtain a rate- and processor-optimal schedule for a fully-static data flow graph (DFG) onto a multiprocessor system is presented. In this technique, Floyd-Warshall´s shortest path algorithm is used to evaluate the relative firing times of the nodes of the given DFG. Despite its implementation simplicity, the proposed technique has a lower time complexity than all the previously proposed techniques. The technique is tested on various benchmark problems to demonstrate its optimal performance
Keywords :
computational complexity; data flow graphs; digital signal processing chips; multiprocessing systems; processor scheduling; DSP data flow graphs; Floyd-Warshall´s shortest path algorithm; benchmark; firing times; implementation simplicity; iteration; multiprocessors; optimal performance; processor-optimal schedule; rate-optimal schedule; second order IIR filter; static data flow graph; Circuits; Data flow computing; Delay effects; Digital signal processing; Flow graphs; Polynomials; Processor scheduling; Scheduling algorithm; Signal processing algorithms; Throughput;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems, 1999. ISCAS '99. Proceedings of the 1999 IEEE International Symposium on
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-5471-0
Type :
conf
DOI :
10.1109/ISCAS.1999.780176
Filename :
780176
Link To Document :
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