DocumentCode
3005035
Title
VLSI implementation of a 16×16 DCT
Author
Chen, T.C. ; Sun, M.-T. ; Gottlieb, A.M.
Author_Institution
Bell Commun. Res. Inc., Red Bank, NJ, USA
fYear
1988
fDate
11-14 Apr 1988
Firstpage
1973
Abstract
The implementation of a 16×16 discrete cosine transform (DCT) chip using a concurrent architecture is presented. The chip is designed for real-time processing of 14.3 MHz sampled video data. The architecture and accuracy studies for finite-wordlength processing are discussed. The chip was implemented, tested, and found to be fully functional. Possible variations are presented for multipurpose (variable transform sizes, forward-backward transform) applications
Keywords
VLSI; computerised picture processing; fast Fourier transforms; video signals; 14.3 MHz; DCT chip; discrete cosine transform; finite-wordlength processing; forward-backward transform; real-time processing; sampled video data; variable transform sizes; Arithmetic; Circuit synthesis; Computer architecture; Discrete cosine transforms; Discrete transforms; Matrix decomposition; Registers; Routing; Sun; Very large scale integration;
fLanguage
English
Publisher
ieee
Conference_Titel
Acoustics, Speech, and Signal Processing, 1988. ICASSP-88., 1988 International Conference on
Conference_Location
New York, NY
ISSN
1520-6149
Type
conf
DOI
10.1109/ICASSP.1988.197011
Filename
197011
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