Pipelined 50 MHz CMOS ASIC for 32 bit binary to residue conversion and residue to binary conversion

A custom CMOS ASIC is designed for a 32 bit binary to residue converter (BRC) to permit residue number system (RNS) operations using 8 moduli with 3 to 5 bit words. A custom ASIC design is also given for the corresponding residue to binary converter (RBC) to convert the 8 RNS moduli words to a unique 32 bit binary number. The result is a complete simulated pipelined design which supports a clock frequency of 50 MHz. These designs are directly applicable to RNS operations for digital signal processing and to direct frequency synthesis