DocumentCode :
3011482
Title :
A 213GHz – 228GHz, −91dB/Hz phase noise triple push oscillator in 65nm CMOS
Author :
Muralidharan, Sriram ; Hella, Mona
Author_Institution :
Rensselaer Polytechnic Institute, USA
fYear :
2012
fDate :
20-23 May 2012
Firstpage :
1062
Lastpage :
1065
Abstract :
This paper presents a wide tuning range sub THz oscillator based on triple push operation. The triple push action combined with the use of slow coplanar waveguide structures and artificial dielectric transmission lines in the passive network results in a 15 GHz tuning range with an f0 of 220GHz using 65nm CMOS technology. The optimization procedure for the oscillator and passives modeling is outlined. A Digitally Controlled Artificial Dielectric transmission line is used to boost the tuning range of the oscillator by 5GHz. The oscillator consumes 19mW of DC power while generating −18dBm of output power with a phase noise of −91 dBc/Hz at 1 MHz offset from a 220 GHz carrier giving it a Figure of Merit of 167.
Keywords :
CMOS integrated circuits; CMOS technology; Integrated circuit modeling; Phase noise; Q factor; Tuning;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location :
Seoul, Korea (South)
ISSN :
0271-4302
Print_ISBN :
978-1-4673-0218-0
Type :
conf
DOI :
10.1109/ISCAS.2012.6271412
Filename :
6271412
Link To Document :
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