A self timed interrupt controller: a case study in asynchronous micro-architecture design

Author

Gloria, Alessandro De ; Faraboschi, Paolo ; Olivieri, Mauro

Author_Institution

Dept. of Biophys. & Electron. Eng., Genoa Univ., Italy

fYear

1994

fDate

19-23 Sep 1994

Firstpage

296

Lastpage

299

Abstract

We report the results of the design and layout simulation of an interrupt controller dedicated to the SGS-Thomson ST9 microprocessor family. The unit is composed of a delay insensitive local control-path and a synchronous local data-path for priority computations. The local control-path is automatically synthesised out of an Occam algorithmic specification, while the local data-path is made up of conventional hardware units. Layout simulation shows that the average time for an interrupt to be served is reduced to 28%

Keywords

Occam; application specific integrated circuits; asynchronous circuits; circuit analysis computing; circuit layout CAD; integrated circuit design; interrupts; microprocessor chips; Occam algorithmic specification; SGS-Thomson ST9 microprocessor family; asynchronous micro-architecture design; delay insensitive local control-path; layout simulation; priority computations; self timed interrupt controller; synchronous local data-path; Asynchronous circuits; Automatic control; Circuit synthesis; Computational modeling; Computer aided software engineering; Computer languages; Delay; Frequency; Hardware; Microprocessors;

fLanguage

English

Publisher

ieee

Conference_Titel

ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International

Conference_Location

Rochester, NY

Print_ISBN

0-7803-2020-4

Type

conf

DOI

10.1109/ASIC.1994.404555

Filename

404555