DocumentCode
3012946
Title
FPGA implementation of heterogeneous multicore platform with SIMD/MIMD custom accelerators
Author
Waidyasooriya, Hasitha Muthumala ; Takei, Yasuhiro ; Hariyama, Masanori ; Kameyama, Michitaka
Author_Institution
Graduate School of Information Sciences, Tohoku University, Aoba 6-6-05, Aramaki, Sendai, Miyagi, 980-8579, Japan
fYear
2012
fDate
20-23 May 2012
Firstpage
1339
Lastpage
1342
Abstract
Heterogeneous multi-core architecture with CPUs and accelerators attract many attentions since they can achieve power-efficient computing in various areas from low-power embedded processing to high-performance computing. Since the optimal architecture is different from application to applications, it is important to explore suitable architectures for different applications. In this paper, we propose an FPGA-based heterogeneous multi-core platform with custom accelerators for power-efficient computing. Our platform allows to select the most suitable accelerator according to the requirements of an application. Moreover, we optimize the number of ALUs, memory and interconnection network of the selected accelerators to increase the performance and to reduce the power consumption. Experimental results with simple media processing applications times power-efficient compared to the GPU.
Keywords
Acceleration; Clocks; Engines; Field programmable gate arrays; Parallel processing; SDRAM; Table lookup; Heterogeneous computing; system-on-chip;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
Conference_Location
Seoul, Korea (South)
ISSN
0271-4302
Print_ISBN
978-1-4673-0218-0
Type
conf
DOI
10.1109/ISCAS.2012.6271489
Filename
6271489
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