• DocumentCode
    3018860
  • Title

    An aVLSI programmable axonal delay circuit with spike timing dependent delay adaptation

  • Author

    Wang, Runchun ; Tapson, Jonathan ; Hamilton, Tara Julia ; Van Schaik, André

  • Author_Institution
    Bioelectronics & Neurosci. Res. Group, Univ. of Western Sydney, Sydney, NSW, Australia
  • fYear
    2012
  • fDate
    20-23 May 2012
  • Firstpage
    2413
  • Lastpage
    2416
  • Abstract
    We present measurements from an aVLSI programmable axonal propagation delay circuit. It is intended to be used in the implementation of polychronous spiking neural networks. The delay can be programmed by presenting an input spike followed by a training spike at the desired delay. To fine tune and maintain the delay using an analogue memory, we use continuous spike timing dependent delay adaptation. Measurements presented here show that the axon circuit is capable of learning and retaining delays in the 2.5-20 ms range, as long as the neuron is stimulated at least once every few seconds.
  • Keywords
    CMOS analogue integrated circuits; VLSI; delay circuits; neural nets; programmable circuits; aVLSI; analogue VLSI; continuous spike timing; polychronous spiking neural networks; programmable axonal propagation delay circuit; spike timing dependent delay adaptation; Delay; Fires; Generators; Nerve fibers; Programming; Training; analogue VLSI; axonal propagation delay; delay adaptation; spiking neurons;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Circuits and Systems (ISCAS), 2012 IEEE International Symposium on
  • Conference_Location
    Seoul
  • ISSN
    0271-4302
  • Print_ISBN
    978-1-4673-0218-0
  • Type

    conf

  • DOI
    10.1109/ISCAS.2012.6271785
  • Filename
    6271785