Title :
Vertical benchmarks for CAD
Author :
Inacio, Christopher ; Schmit, Herman ; Nagle, David ; Ryan, Andrew ; Thomas, Donald E. ; Tong, Yingfai ; Klass, Ben
Author_Institution :
Dept. of Electr. & Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, USA
Abstract :
Vertical benchmarks are complex system designs represented at multiple levels of abstraction. More effective than component-based CAD benchmarks, vertical benchmarks enable quantitative comparison of CAD techniques within or across design flows. This work describes the notion of vertical benchmarks and presents our benchmark, which is based on a commercial DSP, by comparing two alternative design flows
Keywords :
application specific integrated circuits; circuit simulation; digital signal processing chips; high level synthesis; logic simulation; ASIC; CAD benchmarks; Verilog; circuit simulation; commercial DSP; complex system designs; logic synthesis; module generation; multiple levels of abstraction; system-level design; timing analysis; vertical benchmarks; Application specific integrated circuits; Benchmark testing; Circuit testing; DNA computing; Design automation; Digital signal processing; Electronic design automation and methodology; Logic design; Permission; System-level design;
Conference_Titel :
Design Automation Conference, 1999. Proceedings. 36th
Conference_Location :
New Orleans, LA
Print_ISBN :
1-58113-092-9
DOI :
10.1109/DAC.1999.781350
