Title :
An efficient power routing technique to resolve the current crowding effect in the power grid structure of gate arrays
Author :
Yao, Chingchi ; Yamamoto, Ichiro ; Nomura, Shuji
Author_Institution :
OKI Semiconductor, Sunnyvale, CA, USA
Abstract :
This paper is the first report on the detrimental current crowding effect in the power grid structure of gate arrays. Innovative solutions to the problems are described. The proposed power routing technique utilizes flexible metalization with respect to the power pad locations. The resulting structure improves gate utilization and prevents metal electromigration. The CAD physical design flow for implementation in a 0.5 μm CMOS sea-of-gate array is described
Keywords :
CMOS logic circuits; cellular arrays; circuit layout CAD; integrated circuit layout; logic CAD; logic arrays; network routing; 0.5 micron; CAD physical design flow; SOG array; current crowding effect; flexible metalization; gate arrays; metal electromigration prevention; power grid structure; power pad locations; power routing technique; sea-of-gates array; Circuits; Current density; Design automation; Electromigration; MOSFETs; Power grids; Proximity effect; Routing; Sea surface; Variable structure systems;
Conference_Titel :
ASIC Conference and Exhibit, 1994. Proceedings., Seventh Annual IEEE International
Conference_Location :
Rochester, NY
Print_ISBN :
0-7803-2020-4
DOI :
10.1109/ASIC.1994.404592
