A 200 MHz differential sampled data FIR filter for disk drive equalization

Author

Barnett, Ray ; Harjani, Ramesh

Author_Institution

VTC Inc., Bloomington, MN, USA

Volume

1

fYear

1996

fDate

12-15 May 1996

Firstpage

429

Abstract

We describe a 200 MHz sample rate analog finite impulse response (FIR) filter suitable for readback equalization in a disk drive channel. The BiCMOS FIR has seven taps all programmable to six bit weights and is implemented in fully differential form. Eight bit linearity is maintained in each circuit block so that the total FIR linearity is well above the six bits required for disk drive electronics. The FIR uses a new track and hold architecture which reduces power consumption over previous architectures while providing high speed operation. Total power consumed is 150 mW for a 5 volt supply

Keywords

BiCMOS analogue integrated circuits; FIR filters; application specific integrated circuits; equalisers; sample and hold circuits; sampled data filters; 150 mW; 200 MHz; 5 V; BiCMOS; analogue FIR filter; bit weights; differential sampled data FIR filter; disk drive equalization; high speed operation; power consumption; readback equalization; total FIR linearity; track and hold architecture; CMOS logic circuits; Circuit noise; Clocks; Delay lines; Disk drives; Equations; Finite impulse response filter; Linearity; Maximum likelihood detection; Transfer functions;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 1996. ISCAS '96., Connecting the World., 1996 IEEE International Symposium on

Conference_Location

Atlanta, GA

Print_ISBN

0-7803-3073-0

Type

conf

DOI

10.1109/ISCAS.1996.539976

Filename

539976