Title :
Real-time computing of optical flow using adaptive VLSI neuroprocessors
Author :
Fang, Wai-Chi ; Sheu, Bing J. ; Lee, Ji-Chien
Author_Institution :
Dept. of Electr. Eng., Univ. of Southern California, Los Angeles, CA, USA
Abstract :
The multilayer stochastic neural network and its associated VLSI array neuroprocessors are presented for VLSI optical flow computing. This network is well-suited to VLSI implementation due to the high parallelism and local connectivity. Instead of using deterministic scheme, a stochastic decision rule implemented with electronic annealing techniques is used to search optimal solutions. VLSI array neuroprocessor architecture is proved to be an effective supercomputing hardware for real-time optical flow applications. A prototype 25-neuron chip for this VLSI array neuroprocessors (called a velocity-selective hyperneuron chip) has been implemented using MOSIS 2-μm CMOS technology. A real-time optical flow machine is feasible by using arrays of hyperneuron chips
Keywords :
CMOS integrated circuits; VLSI; computer vision; neural nets; 25-neuron chip; MOSIS 2-μm CMOS technology; VLSI array neuroprocessors; VLSI optical flow computing; adaptive VLSI neuroprocessors; electronic annealing; local connectivity; multilayer stochastic neural network; optical flow; real-time optical flow applications; simulated annealing; stochastic decision rule; supercomputing hardware; velocity-selective hyperneuron chip; Adaptive optics; CMOS technology; Image motion analysis; Multi-layer neural network; Neural networks; Optical arrays; Optical computing; Optical fiber networks; Stochastic processes; Very large scale integration;
Conference_Titel :
Computer Design: VLSI in Computers and Processors, 1990. ICCD '90. Proceedings, 1990 IEEE International Conference on
Conference_Location :
Cambridge, MA
Print_ISBN :
0-8186-2079-X
DOI :
10.1109/ICCD.1990.130180