Rapid prototyping of DSP systems via system interface module generation

As part of ARPA´s RASSP program, Lockheed Martin ATL Laboratories has proposed a methodology for rapid prototyping using a plug and play approach. The methodology is based on encapsulation of the basic architectural elements in a design library. The encapsulation interface provides a uniform external view that is independent of the internal functionality of its component. In addition to encapsulating the functionality, the library also captures the low level I/O protocols along with relevant timing information both in synthesis and simulation views that are used for logic generation and the virtual prototyping phase of the development, respectively. The encapsulation is done via VHDL to provide a standard path to the existing synthesis tools. Given a library of encapsulated components, the net list for a functional hardware prototype can be obtained in a matter of hours. We examine this approach in detail in this paper and present some new results on efficient encapsulation