Title :
Design of bi-directional bus nets
Author :
Zhu, Qing K. ; Wu, Archie
Abstract :
This paper shows the application of bi-directional bus in a reconfigurable communication chip. Based on author´s knowledge, there is very little research has been done on the bi-directional interconnect inside the chip due to limited applications. This paper formulates the design objective and timing constraints for the physical implementation. Then we discuss the optimization techniques including the wire sizing and clustering of tri-state buffers. These techniques have been applied in the 128-bit bi-directional roadrunner data bus design for this reconfigurable communication chip. The implementation details and other design issues such as the metal line self-heating and place & route CAD flow are also discussed in the paper.
Keywords :
buffer circuits; circuit layout CAD; circuit optimisation; circuit simulation; network routing; reconfigurable architectures; system buses; tree searching; bidirectional bus nets; design objective; metal line self-heating; optimization; physical implementation; place and route CAD flow; reconfigurable communication chip; roadrunner bus; timing constraints; tree search algorithm; tristate buffers clustering; wire sizing; Bidirectional control; Capacitance; Delay effects; Delay estimation; Equations; Logic; Repeaters; Routing; Timing; Wire;
Conference_Titel :
Electronics, Circuits and Systems, 2003. ICECS 2003. Proceedings of the 2003 10th IEEE International Conference on
Print_ISBN :
0-7803-8163-7
DOI :
10.1109/ICECS.2003.1301830
