Title :
Fabrication and electrical characteristics of self-aligned (SA) gate-all-around (GAA) si nanowire MOSFETs (SNWFET)
Author :
Kim, Dong-Won ; Yeo, Kyoung Hwan ; Suk, Sung Dae ; Li, Ming ; Yeoh, Yun Young ; Sohn, Dong Kyun ; Chung, Chilhee
Author_Institution :
Semicond. R&D Center, Samsung Electron. Co., Yongin, South Korea
Abstract :
We have proposed gate-all-around Silicon nanowire MOSFET (SNWFET) on bulk Si as an ultimate transistor. Well controlled processes are used to achieve gate length (LG) of sub-10nm and narrow nanowire widths. Excellent performance with reasonable VTH and short channel immunity are achieved owing to thin nanowire channel, self-aligned gate, and GAA structure. Transistor performance with gate length of 10nm has been demonstrated and nanowire size (DNW) dependency of various electrical characteristics has been investigated. Random telegraph noise (RTN) in SNWFET is studied as well.
Keywords :
MOSFET; elemental semiconductors; nanowires; random noise; silicon; transistors; SNWFET; bulk Si; electrical characteristic; gate-all-around silicon nanowire MOSFET; nanowire size; random telegraph noise; self-aligned gate; thin nanowire channel; transistor; Electric variables; Etching; Fabrication; Germanium silicon alloys; Immune system; MOSFETs; Process control; Silicon compounds; Silicon germanium; Tin;
Conference_Titel :
IC Design and Technology (ICICDT), 2010 IEEE International Conference on
Conference_Location :
Grenoble
Print_ISBN :
978-1-4244-5773-1
DOI :
10.1109/ICICDT.2010.5510288
