DocumentCode
3031069
Title
0.18 μm CMOS and beyond
Author
Eaglesham, D.J.
Author_Institution
Bell Labs., Lucent Technol., Murray Hill, NJ, USA
fYear
1999
fDate
1999
Firstpage
703
Lastpage
708
Abstract
As we move to the 0.18 μm node and beyond, the dominant trend in device and process technology is a simple continuation of several decades of scaling. However, some serious challenges to straightforward scaling are on the horizon. This paper reviews the present status of process technology and examines the likely departures from scaling in the various areas. The 0.18 μm node is seeing the first major new materials introduced into the Si process for many years in the interconnect, and major departures from the traditional process are being actively considered for the transistor. However, it is probable that continued scaling will continue to dominate advanced processes for several generations to come
Keywords
CMOS integrated circuits; integrated circuit technology; lithography; reviews; 0.18 micron; CMOS scaling; Cu; Cu interconnect; Si; device technology; lithographic processes; process technology; system-on-chip; Acceleration; Breakdown voltage; CMOS technology; Delay; Integrated circuit interconnections; Lithography; Permission; Power system interconnection; Power system management; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference, 1999. Proceedings. 36th
Conference_Location
New Orleans, LA
Print_ISBN
1-58113-092-9
Type
conf
DOI
10.1109/DAC.1999.782043
Filename
782043
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