DocumentCode :
3032363
Title :
Wafer-scale massively parallel computing modules for fault-tolerant signal and data processing
Author :
Lea, R.M.
Author_Institution :
Aspex Microsyst. Ltd., Brunel Univ., Uxbridge, UK
fYear :
1991
fDate :
18-20 Nov 1991
Firstpage :
20
Lastpage :
23
Abstract :
A WASP device is a WSI implementation of an ASP (Associative String Processor) substring and, as such, it constitutes a fundamental building block for the assembly of SIMD Massively Parallel Computer (MPC) components. This paper describes current progress in the WASP 3/4/5 programme
Keywords :
VLSI; digital signal processing chips; fault tolerant computing; microprocessor chips; packaging; parallel processing; Massively Parallel Computer; SIMD; WASP 3/4/5 programme; WASP device; WSI associative string processor; WSI implementation; data processing; fault tolerant processing; fundamental building block; massively parallel computing modules; signal processing; Application specific processors; Chromium; Circuit faults; Contracts; Data processing; Fabrication; Fault tolerance; Parallel processing; Signal processing; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Defect and Fault Tolerance on VLSI Systems, 1991. Proceedings., 1991 International Workshop on
Conference_Location :
Hidden Valley, PA
ISSN :
1550-5774
Print_ISBN :
0-8186-2457-4
Type :
conf
DOI :
10.1109/DFTVS.1991.199940
Filename :
199940
Link To Document :
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