Abstract :
Certain mission critical applications such as automotive, medical, aerospace, etc. have been voicing the need for "Zero DPPM" for shipped parts. With rapid scaling of semiconductor devices along with technological innovations that include material and process changes, some of the current DFT techniques as well as the conventional fault models are inadequate to achieve such an ambitious goal. This talk will focus on discussing the latest fault models that are being used in these market segments to improve the overall test quality. There is an increasing trend to generate "defect-aware" test vectors that maximize the chances of detecting potential manufacturing defects. Digital tests are also being designed to play an important role in detecting systematic defects rather than just random defects, thereby making it possible to identify quickly process related issues. The talk will highlight some of the above techniques to improve the overall test quality, and conclude by briefly presenting ways to manage exponential increase in test costs while guaranteeing the highest level of test quality.
Keywords :
design for testability; integrated circuit design; semiconductor devices; DFT techniques; defect-aware test vectors; digital tests; fault models; manufacturing defects; market segments; rapid scaling; semiconductor devices; zero DPPM; Aerospace materials; Automotive engineering; Costs; Manufacturing; Mission critical systems; Quality management; Semiconductor devices; Semiconductor materials; System testing; Technological innovation;
