Title :
Programmable all-digital adaptive deskewing and phase shifting
Author :
Kaviani, Alireza ; Pi, Tao ; Kelly, Declan
Author_Institution :
Xilinx, San Jose, CA
Abstract :
A programmable digital deskewing and phase shifting architecture is presented, supporting a wide range of frequency with a fine granularity of shift control. Proposed design is based on a digital delay line that is distinguished from previous work by area and power efficiency. Proposed design takes less than 0.05 mm2 in 90 nm and dissipates 54 muW/MHz. Silicon results show three times area saving and four times wider operation frequency compared to alternative implementations.
Keywords :
field programmable gate arrays; phase shifters; FPGA; digital delay line; phase shifting architecture; power efficiency; programmable all-digital adaptive deskewing; shift control; size 90 nm; Charge coupled devices; Clocks; Counting circuits; Delay lines; Field programmable gate arrays; Frequency; Oscillators; Phase locked loops; Silicon; Switches;
Conference_Titel :
SOC Conference, 2008 IEEE International
Conference_Location :
Newport Beach, CA
Print_ISBN :
978-1-4244-2596-9
Electronic_ISBN :
978-1-4244-2597-6
DOI :
10.1109/SOCC.2008.4641538
