DocumentCode :
3044526
Title :
X-clock routing based on pattern matching
Author :
Tsai, Chia-Chun ; Kuo, Chung-Chieh ; Wu, Jan-Ou ; Lee, Trong-Yen ; Hsiao, Rong-Shue
Author_Institution :
Dept. of Comput. Sci. & Inf. Eng., Nanhua Univ., Nanhua
fYear :
2008
fDate :
17-20 Sept. 2008
Firstpage :
357
Lastpage :
360
Abstract :
In this paper, we propose an X-architecture routing algorithm for a clock network. With the definition of 16-pattern X-routing for a pair of points, our algorithm applies these patterns to simplify the selection of merging segments whereas using the DME approach and constructs an X-clock tree with zero skew. An X-flip is employed to shorten the wire length of each pair of points as possible for minimal clock delay. Moreover, a wire sizing is applied to remove snaking wires for saving routing resource. Experimental results on benchmarks compared with other X-routing algorithms show that our improvements in terms of clock delay, wire length, power consumption, and via cost are 16%, 0.8%, 1.5%, and 17.4%, respectively.
Keywords :
clocks; network routing; pattern matching; DME approach; X-clock routing; clock delay; deffered merge embedding algorithm; minimal clock delays; pattern matching; power consumption; wire length; wire sizing; Clocks; Costs; Delay estimation; Energy consumption; Joining processes; Partitioning algorithms; Pattern matching; Routing; Topology; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
SOC Conference, 2008 IEEE International
Conference_Location :
Newport Beach, CA
Print_ISBN :
978-1-4244-2596-9
Electronic_ISBN :
978-1-4244-2597-6
Type :
conf
DOI :
10.1109/SOCC.2008.4641544
Filename :
4641544
Link To Document :
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