A 10 Gb/s 4-PAM transceiver with adaptive pre-emphasis

Author

Yoo, Sungmin ; Yun, Daeho ; Song, Bongsub ; Burm, Jinwook ; Chung, Jinil ; Chun, Jun Hyun

Author_Institution

Dept. of Electron. Eng., Sogang Univ., Seoul, South Korea

fYear

2011

fDate

12-14 Dec. 2011

Firstpage

258

Lastpage

261

Abstract

A 10 Gb/s 4-level pulse amplitude modulation (PAM) transceiver was implemented using a 0.13 μm CMOS process. The implemented 4-PAM transmitter employs current mode logics (CMLs) for high-speed operations. The proposed 4-PAM transceiver achieves a channel efficiency of 2 bit/symbol with adaptive pre-emphasis. The pre-emphasis was designed to be proportional to each 4-level´s amplitude. The measured maximum data-rate was 10 Gb/s over 0.7-m cable and 3-cm printed circuit board (PCB) traces. The transmitter and receiver consume 245 mW and 69 mW, respectively. The measured bit-error rate (BER) was less than 10^-12 at 10 Gb/s data rate.

Keywords

CMOS logic circuits; error statistics; pulse amplitude modulation; transceivers; transmitters; 4-PAM transceiver; 4-PAM transmitter; 4-level amplitude; 4-level pulse amplitude modulation transceiver; BER; CMOS process; adaptive preemphasis; bit rate 10 Gbit/s; bit-error rate; channel efficiency; current mode logics; power 245 mW; power 69 mW; printed circuit board traces; size 0.13 mum; size 3 cm; word length 2 bit; Bismuth; Digital control; Receivers; Semiconductor device measurement; Silicon; Transceivers; Transmitters; Pre-emphasis 4-PAM transceiver CML;

fLanguage

English

Publisher

ieee

Conference_Titel

Integrated Circuits (ISIC), 2011 13th International Symposium on

Conference_Location

Singapore

Print_ISBN

978-1-61284-863-1

Type

conf

DOI

10.1109/ISICir.2011.6131945

Filename

6131945