Design optimization of MOS operational amplifiers using finite difference sensitivity

MOS analog circuit sizing is considered a highly complex task that requires experience and skills. Many methods proposed in the literature have arguable merits and limitations; none of them has become a widely recognized method being adopted in the design practice. This paper attempts to use a simply computable metric called the finite difference sensitivity computed mainly in the ac domain for the purpose of device sizing. Multiple design goals are formulated as a weighted optimization objective function and a gradient search is developed for optimizing the objective function. All constraints are subsumed in the objective function in the form of penalty functions. Experimental results show that such a simple formulation of circuit optimization is capable of finding satisfactory suboptimal sizing results which can be used for subsequent manual tuning or layout reference. The automated sizing procedure is compared to manual sizing and is demonstrated that the auto-sizing scheme has a better capability in balancing the multiple design objectives.