DocumentCode :
3048411
Title :
On n-detection test sequences for synchronous sequential circuits
Author :
Pomeranz, Irith ; Reddy, Sudhakar M.
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa Univ., Iowa City, IA, USA
fYear :
1997
fDate :
27 Apr-1 May 1997
Firstpage :
336
Lastpage :
342
Abstract :
Test sets that detect each stuck-at fault n>1 times (called n-detection test sets) were shown to achieve higher defect coverages than conventional single stuck-at 1-detection test sets. Previous studies of n-detection test sets concentrated on combinational circuits. In this work, we study n-detection test sequences for synchronous sequential circuits. We propose four definitions of the number of detections achieved by a test sequence. We describe fault simulation and test generation procedures based on these definitions, and evaluate them on benchmark circuits by using non-feedback bridging faults to model defects. The results indicate the usefulness of the simplest definition in generating test sequences that achieve improved defect coverages
Keywords :
automatic testing; fault diagnosis; integrated circuit testing; integrated logic circuits; logic testing; sequences; sequential circuits; defect coverages; fault simulation; n-detection test sequences; stuck-at fault detection; synchronous sequential circuits; test generation procedures; Circuit faults; Circuit simulation; Circuit testing; Cities and towns; Combinational circuits; Electrical fault detection; Fault detection; Sequential analysis; Sequential circuits; Synchronous generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
VLSI Test Symposium, 1997., 15th IEEE
Conference_Location :
Monterey, CA
ISSN :
1093-0167
Print_ISBN :
0-8186-7810-0
Type :
conf
DOI :
10.1109/VTEST.1997.600299
Filename :
600299
Link To Document :
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