DocumentCode
304867
Title
On sensor image compression for high pixel rate imaging: pixel parallel and column parallel architectures
Author
Aizawa, K. ; Hamamoto, T. ; Egi, Y. ; Hatori, M. ; Yamazaki, J.
Author_Institution
Dept. of Electr. Eng., Tokyo Univ., Japan
Volume
1
fYear
1996
fDate
16-19 Sep 1996
Firstpage
1019
Abstract
We propose a novel concept of an integration of compression and sensing in order to enhance performance of an image sensor. By integrating the compression function on the sensor plane, the image signal that has to be read out from the sensor is significantly reduced. Thus, the integration can consequently increase the pixel rate of the sensor. The compression scheme we make use of is conditional replenishment that detects and encodes moving areas. In this paper, we discuss design and implementation of two architectures for on-sensor compression. One is a pixel parallel approach and the other is a column parallel approach. We describe both approaches and design and a prototype of pixel parallel architecture
Keywords
CMOS digital integrated circuits; data compression; digital signal processing chips; image coding; image sensors; integrated circuit layout; motion estimation; parallel architectures; column parallel architectures; compression function; conditional replenishment; design; high pixel rate imaging; image sensor; image signal; implementation; integration; moving areas; on-sensor compression; performance; pixel parallel architectures; sensor image compression; sensor plane; Biological information theory; Biosensors; CMOS image sensors; High-resolution imaging; Image coding; Image sensors; Parallel architectures; Pixel; Prototypes; Retina;
fLanguage
English
Publisher
ieee
Conference_Titel
Image Processing, 1996. Proceedings., International Conference on
Conference_Location
Lausanne
Print_ISBN
0-7803-3259-8
Type
conf
DOI
10.1109/ICIP.1996.561080
Filename
561080
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