DocumentCode
3049451
Title
Scheduling and 2D placement heuristics for partially reconfigurable systems
Author
Redaelli, F. ; Santambrogio, M.D. ; Rana, V. ; Memik, S. Ogrenci
Author_Institution
Dipt. di Elettron. e dell´´Inf., Politec. di Milano, Milan, Italy
fYear
2009
fDate
9-11 Dec. 2009
Firstpage
223
Lastpage
230
Abstract
This paper proposes new scheduling and 2D placement heuristics for partially dynamically reconfigurable systems. One specific focus of this work is to deal with applications containing hundreds of tasks grouped in a few number of task types. Such a task graph structure is representative of data intensive high performance applications. We present three variations to our task management method that correspond to three possible system scenarios: (i) possessing complete static knowledge of task sequences, (ii) only having information on the maximum resource requirement by any task expected to be executed, and (iii) having no prior knowledge of any kind about the workload. Each variant of our scheduler addresses an architecture that best matches the needs of a particular configuration of the system. Together they form a complete set of techniques to serve partial dynamic reconfiguration of massively parallel computing systems.
Keywords
field programmable gate arrays; microprocessor chips; reconfigurable architectures; scheduling; 2D placement heuristics; FPGA; massively parallel computing systems; partially reconfigurable systems; scheduling; task graph structure; task management method; task sequences; Application software; Computer architecture; Computer science; Dynamic scheduling; High performance computing; Knowledge management; Prefetching; Processor scheduling; Resource management; Supercomputers;
fLanguage
English
Publisher
ieee
Conference_Titel
Field-Programmable Technology, 2009. FPT 2009. International Conference on
Conference_Location
Sydney, NSW
Print_ISBN
978-1-4244-4375-8
Electronic_ISBN
978-1-4244-4377-2
Type
conf
DOI
10.1109/FPT.2009.5377683
Filename
5377683
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