Title :
Automatic system architecture synthesis for FPGA-based reconfigurable computers
Author :
Lin, Colin Yu ; Wong, Ngai ; So, Hayden Kwok-Hay
Author_Institution :
Dept. of Electr. & Electron. Eng., Univ. of Hong Kong, Hong Kong, China
Abstract :
The goal of this PhD project is to develop an automatic method of system architecture synthesis for general high-performance applications on FPGA-based reconfigurable computers. Through our previous research, we have built a theoretical model targeting the scheduling problem with first-order hardware constraints. And a list scheduling algorithm is developed to achieve near-optimal performances. Currently, we are working on the low-level implementation. A systolic architecture is used, and the list scheduling algorithm will be extended to take into account constraints deriving from exact hardware architecture.
Keywords :
field programmable gate arrays; logic design; processor scheduling; reconfigurable architectures; FPGA based reconfigurable computers; automatic system architecture synthesis; field programmable gate arrays; first-order hardware constraints; hardware architecture; near-optimal performance; scheduling algorithm; systolic architecture; theoretical model; Application software; Computer architecture; Computer vision; Delay; Field programmable gate arrays; Hardware; High performance computing; Processor scheduling; Reconfigurable architectures; Scheduling algorithm;
Conference_Titel :
Field-Programmable Technology, 2009. FPT 2009. International Conference on
Conference_Location :
Sydney, NSW
Print_ISBN :
978-1-4244-4375-8
Electronic_ISBN :
978-1-4244-4377-2
DOI :
10.1109/FPT.2009.5377691
