DocumentCode :
3053161
Title :
A load balancing method for improving fault tolerance in mesh based networks on chip
Author :
Mehrizi, Hamed Sadat ; Zeinali, Esmaeil
Author_Institution :
Dept. of Electr., IT & Comput. Sci., Islamic Azad Univ., Qazvin, Iran
fYear :
2013
fDate :
23-25 Oct. 2013
Firstpage :
1
Lastpage :
5
Abstract :
This paper presents an adaptive routing algorithm for 2D mesh network-on-chips (NoCs). The algorithm is based on DyXY routing algorithm. Our proposed routing algorithm is a very low cost fault-tolerant routing method to tolerate at least one faulty link in mesh-based on chip networks. It is a distributed, adaptive, congestion-aware and deadlock-free routing algorithm where only two virtual channels are used for adaptiveness and fault-tolerance. This is obtained by using two congestion flags between each two nodes which demonstrate the existence of congestion in a row or column. The same flags may be used to alarm a link failure in a row or column. The network performance, fault-tolerance capability and hardware overhead are computed through appropriate simulations. The experimental results show that the overall reliability and throughput of a NoCs is significantly elevated against at least one link failure with only a small latency overhead.
Keywords :
network-on-chip; resource allocation; DyXY routing algorithm; NoC; adaptive routing algorithm; congestion-aware routing algorithm; deadlock-free routing algorithm; distributed routing algorithm; fault tolerance; load balancing; mesh based networks on chip; Fault tolerance; Fault tolerant systems; Ports (Computers); Routing; Switches; Wires; Congestion fault tolerance; network-on-chip; reconfiguration; routing algorithm;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application of Information and Communication Technologies (AICT), 2013 7th International Conference on
Conference_Location :
Baku
Print_ISBN :
978-1-4673-6419-5
Type :
conf
DOI :
10.1109/ICAICT.2013.6722732
Filename :
6722732
Link To Document :
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