Title :
Design and implementation of a DAB channel decoder
Author :
Ming-Der Shieh ; Chien-Ming Wu ; Hsiao-Hsing Chou ; Min-Hui Chen ; Chia-Liang Liu
Author_Institution :
Dept. of Electron. Eng., Nat. Yunlin Univ. of Sci. & Technol., Taiwan
Abstract :
This paper describes the design of de-interleaver and Viterbi decoder for the Eureka-147 DAB system and their corresponding VLSI implementations. We emphasize on how to efficiently handle four DAB transmission modes, time/frequency de-interleaving and path metric/survivor memory management in our development. Results show that our implementation has the potential of consuming less silicon area and power dissipation, and facilitating the extension for high transmission rate requirement.
Keywords :
VLSI; Viterbi decoding; digital audio broadcasting; digital signal processing chips; integrated circuit design; radio receivers; storage management; DAB channel decoder; DAB transmission mode; Eureka-147 DAB system; VLSI implementation; Viterbi decoder; de-interleaver; design; frequency de-interleaving; high transmission rate; implementation; path metric management; survivor memory management; time de-interleaving; Communication industry; Decoding; Design engineering; Hardware; Industrial electronics; Memory management; Protection; Random access memory; Read only memory; Viterbi algorithm;
Conference_Titel :
Consumer Electronics, 1999. ICCE. International Conference on
Conference_Location :
Los Angeles, CA, USA
Print_ISBN :
0-7803-5123-1
DOI :
10.1109/ICCE.1999.785174
