DocumentCode :
3054081
Title :
A reconfigurable online BIST for combinational hardware using digital neural networks
Author :
Hosseini, S. Behdad ; Shahabi, Ali ; Sohofi, Hassan ; Navabi, Zainalabedin
Author_Institution :
CAD Lab., Univ. of Tehran, Tehran, Iran
fYear :
2010
fDate :
24-28 May 2010
Firstpage :
139
Lastpage :
144
Abstract :
Online testing, one of the most challenging issues in design for test domain, is intended for inspection of digital systems behavior during their working period. This paper presents a novel approach for simultaneous online testing of several combinational circuits using a reconfigurable neural network implemented along the original hardware. Automatic generation of the neural network to model the behavior of each design is proposed as well as required techniques to obtain optimum configuration for its hardware realization. Advantages and shortcomings of this approach in terms of area overhead, fault latency and reliability are discussed as well.
Keywords :
combinational circuits; electronic engineering computing; integrated circuit testing; neural nets; combinational circuits; combinational hardware; digital neural networks; digital system behavior; fault latency; fault reliability; online testing; reconfigurable online BIST; Built-in self-test; Circuit faults; Circuit testing; Combinational circuits; Delay; Digital systems; Inspection; Neural network hardware; Neural networks; System testing; Digital Logic Modeling; Digital Neural Networks; On-line Testing; Self-Checking;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Test Symposium (ETS), 2010 15th IEEE European
Conference_Location :
Praha
ISSN :
1530-1877
Print_ISBN :
978-1-4244-5834-9
Electronic_ISBN :
1530-1877
Type :
conf
DOI :
10.1109/ETSYM.2010.5512769
Filename :
5512769
Link To Document :
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