Title :
A cost-effective D-TV system chip set
Author :
Mihara, Y. ; Hirase, K. ; Tanaka, M. ; Yamashita, A.
Author_Institution :
Hypermedia Res. Centre, Sanyo, Japan
Abstract :
This paper proposes a cost-effective D-TV system chip set. The video decoder is applicable up to MP@HL, and a new down-decode technique is adopted to reduce an amount of video frame memory to a quarter.
Keywords :
decoding; digital signal processing chips; digital television; high definition television; television receivers; video signal processing; MP@HL; cost-effective D-TV system chip set; down-decode technique; video decoder; video frame memory; Costs; Decoding; Demodulation; Digital TV; Displays; Error correction; Error correction codes; HDTV; Reduced instruction set computing; Streaming media;
Conference_Titel :
Consumer Electronics, 1999. ICCE. International Conference on
Conference_Location :
Los Angeles, CA, USA
Print_ISBN :
0-7803-5123-1
DOI :
10.1109/ICCE.1999.785197
