DocumentCode :
3057169
Title :
DELTRON: Neuromorphic architectures for delay based learning
Author :
Hussain, Shiraz ; Basu, Anirban ; Wang, Michael ; Hamilton, Tara J.
Author_Institution :
Sch. of EEE, Nanyang Technol. Univ., Singapore, Singapore
fYear :
2012
fDate :
2-5 Dec. 2012
Firstpage :
304
Lastpage :
307
Abstract :
We present a neuromorphic spiking neural network, the DELTRON, that can remember and store patterns by changing the delays of every connection as opposed to modifying the weights. The advantage of this architecture over traditional weight based ones is simpler hardware implementation without multipliers or digital-analog converters (DACs). The name is derived due to similarity in the learning rule with an earlier architecture called Tempotron. We present simulations of memory capacity of the DELTRON for different random spatio-temporal spike patterns and also present SPICE simulation results of the core circuits involved in a reconfigurable mixed signal implementation of this architecture.
Keywords :
SPICE; learning (artificial intelligence); mixed analogue-digital integrated circuits; neural net architecture; DELTRON; SPICE; core circuits; delay based learning; mixed signal implementation; neuromorphic architectures; neuromorphic spiking neural network; spatio-temporal spike patterns; Computer architecture; Delay; Nerve fibers; Neuromorphics; Registers; Training;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Circuits and Systems (APCCAS), 2012 IEEE Asia Pacific Conference on
Conference_Location :
Kaohsiung
Print_ISBN :
978-1-4577-1728-4
Type :
conf
DOI :
10.1109/APCCAS.2012.6419032
Filename :
6419032
Link To Document :
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