Title :
On synthesis of speed-independent circuits at STG level
Author :
Lin, Kuan-Jen ; Kuo, Chi-Wen
Author_Institution :
Dept. of Electr. Eng., Chinese Junior Coll. of Technol. & Commerce, Taipei, Taiwan
Abstract :
Synthesizing hazard-free asynchronous circuits directly at signal transition graph (STG) level has been shown to need significantly less CPU time than approaches at the state-graph. However, all previous methods at STG level were based on sufficient conditions only. Hence, the synthesized circuit results generally are inferior, due to the incomplete transformation. We present a new characteristic graph (CG) to encapsulate all feasible solutions of the original STG in reduced size, which compares favorably with the state graph approach. The requirements of speed independent circuits can then be completely transformed into the CG. Furthermore, we derive a necessary and sufficient condition for speed independent implementation based on a predefined general circuit model, which has not yet been reported. With CGs and this condition, we develop a heuristic synthesis algorithm which derives solutions similar to the state-graph approach while requiring significantly less CPU time
Keywords :
Petri nets; asynchronous circuits; heuristic programming; logic CAD; signal flow graphs; CPU time; Petri net; STG level; characteristic graph; circuit model; hazard-free asynchronous circuit synthesis; heuristic synthesis algorithm; signal transition graph level; speed-independent circuit synthesis; state-graph level; Asynchronous circuits; Business; Central Processing Unit; Character generation; Circuit synthesis; Delay; Educational institutions; Heuristic algorithms; Signal synthesis; Sufficient conditions;
Conference_Titel :
Design Automation Conference, 1997. Proceedings of the ASP-DAC '97 Asia and South Pacific
Conference_Location :
Chiba
Print_ISBN :
0-7803-3662-3
DOI :
10.1109/ASPDAC.1997.600345